A.alive
B.live
第1题:
下列是基于过程块的组合逻辑建模的代码,设计正确的是()
A.reg y; reg a,b,clear; ... always@* if(clear) y=1'b0; always@* y=a & b;#B.always@* if (clear) y=1'b0; else y=a&b;#C.always@(a) y=a & b;#D.reg [1:0] s; ... case(s) 2'b00:y=1'b1; 2'b10:y=1'b0; 2'b11:y=1'b1; endcase第2题:
设指针变量front表示链式队列的队头指针,指针变量rear表示链式队列的队尾指针,指针 变量s指向将要入队列的结点X,则入队列的操作序列为()。
A.front->next=s;front=s;
B.s->next=rear;rear=s;
C.rear->next=s;rear=s;
D.s->next=front;front=s;
第3题:
下列Moore型状态机采用Verilog语言主控时序部分正确的是:
A.always@(posedge clk or negedge reset) begin if(!reset) current_state<=s0; else current_state<=next_state; end
B.always@(posedge clk ) begin if(!reset) current_state<=s0; else current_state<=next_state; end
C.always@(posedge clk t) if(reset) current_state<=s0; else current_state<=next_state;
D.always@(posedge clk or negedge reset) if(reset) current_state<=s0; else current_state<=next_state;
第4题:
4、以下的描述中,必然是对Mealy型状态机的描述的是?
A.always @(*) case (state) S0: begin out = 0; if (in) next_state = S1; else next_state = S2; end ……#B.always @(*) case (state) S0: begin if (in) next_state = S1; else next_state = S0; end ……#C.always @(*) case (state) S0: begin if (in) begin next_state = S1; out=1 end else next_state = S0; end ……#D.以上答案均不正确第5题:
1、已知带头结点的链队列指针Q,则该队列做新元素结点s进队操作的语句是()
A.Q->rear->next=s; Q->rear=s;
B.s->next=Q->front->next; Q->front->next=s;
C.Q->next=s;Q=s;
D.s->next=Q->next ;Q->next=s;
第6题:
以下的描述中,必然是对Mealy型状态机的描述的是?
A.always @(*) case (state) S0: begin out = 0; if (in) next_state = S1; else next_state = S2; end ……#B.always @(*) case (state) S0: begin if (in) next_state = S1; else next_state = S0; end ……#C.always @(*) case (state) S0: begin if (in) begin next_state = S1; out=1 end else next_state = S0; end ……#D.以上答案均不正确