L3 cache operates faster than the system processor.
L3 cache runs at the speed of the processor.
L3 cache can deliver data in as little as 15ns.
L3 cache runs at the speed of the system bus.
第1题:
Which Coherence caching pattern matches the sequence of events ?() 1. Data is requested from cache 2. The requested data does not exist in the cache (cache miss) 3. The Coherence cache store is used to red data from the back-end persistent data source, and placed in ther cache 4. Data requested from the cache is returned to the caller
第2题:
Which of the following statements is true about L3 cache?()
第3题:
A customer is unsure how POWER7 processors can outperform POWER6 processors when the clock speeds are slower. What contributes to the improved performance?()
第4题:
HP新发布的Itanium2处理器每双核最高L3 cache是24MB,而IBM POWER Systems服务器采用的POWER6处理器,每双核共享多少L3 cache?()
第5题:
Automatic Shared Memory Management (ASMM) has been enabled for your database instance. Theinitialization parameters for the components that are managed by ASMM are not set. After observing theeffects of ASSM, you executed the following command: SQL> ALTER SYSTEM SET DB_CACHE_SIZE = 100M; Which statement is true in this scenario()
第6题:
You are analyzing how Oracle processes user statements. SQL and PL/SQL parse information is stored in which of the following database memory areas? ()
第7题:
It places frequently accessed data close to the processor to help deliver faster performance.
It replaces L3 cache memory.
It speeds up processor performance by purging the current set of instructions and freeing them up to work on the next set of instructions.
It allows the system to address more than 16GB of memory.
第8题:
Added Turbo memory switching
Removed internal OLTP limits
Moved L3 cache onto the chip
Increased DDR2 memory speeds
第9题:
Library cache
Row cache
Dictionary cache
Large area
Buffer cache
第10题:
read through
write through
refresh ahead
write behind
第11题:
Replace the two 3.0 GHz DP processors with four 3.0GHz MP processors with a 4MB L3 cache and 4GB of RAM
Replace the x445 with an x366 with four 3.66 EM64T processors with a 1MB L2 cache and 4GB of RAM
Replace the two 3.0GHz DP processors with two 3.0GHz MP processors with a 4MB L3 cache and 2GB RAM
Replace the two 3.0GHz DP processors with four 3.0 GHz DP processors with a 512KB L2 cache and 4GB RAM
第12题:
L1 cache operates faster than the processor.
L1 cache is directly connected to the processor.
L1 cache can deliver data in 5ns.
L1 cache is located on the system board.
第13题:
Which of the following statements is true about L1 cache?()
第14题:
以下关于Power7的描述,哪一项是错误的?()
第15题:
An x445 with two 3.0GHz DP processors and 2GB of RAM is running a processor-intensive floating-point geological application that calculates pressures in the earth’s crust. It takes a long time for each calculation, and the director of computing wants the calculations to take less time. Memory addressed by the application may also be a bottle neck. Which of the following will most improve the ability to run the calculations in less time?()
第16题:
Which statements are true regarding the Query Result Cache?()
第17题:
Which two statements are true about setting the per-thread buffers higher than required?()
第18题:
Records from the data dictionary information are stored in which of the following database memory areas?()
第19题:
L3 cache operates faster than the system processor
L3 cache runs at the speed of the processor.
L3 cache can deliver data in as little as 15ns.
L3 cache runs at the speed of the system bus.
第20题:
Library cache
Row cache
Session UGA
Buffer cache
第21题:
30MB
32MB
36MB
40MB
第22题:
More memory per thread is beneficial in all scenarios
It causes increased overhead due to initial memory allocation
It can affect system stability during peak load times, due to swapping
It requires increasing the thread_cache_size variable
第23题:
The minimum memory size for the database buffer cache is set to 100 mb.
The maximum memory size that can be obtained by the database buffer cache during ASMM is set to100 mb
The minimum memory size allocated for a server process in the database buffer cache in dedicatedmode is set to 100 mb.
The maximum memory size from the database buffer cache that can be released for dynamicdistribution during ASMM is set to 100 mb
第24题:
12MB
18MB
24MB
36MB