PCI
Frontside bus
Backside bus
System I/O bus
第1题:
PC中CPU执行MOV指令从存储器读取数据时,数据搜索的顺序是( )。
A.L1 Cache、L2 Cache、DRAM和外设
B.L2 Cache、L1 Cache、DRAM和外设
C.DRAM、外设、L2 Cache和L1 Cache
D.外设、DRAM、L1 Cache和L2 Cache
第2题:
下列关于L2 Cache说法有误的是()
第3题:
When designing a PC, which of the following components would help a large application load theFASTEST?()
第4题:
Which of the following defines memory interleaving?()
第5题:
Upgrading which of the following components in a server has the GREATEST affect on virtualization?()
第6题:
Which of the following are primary differences between a laptop and a desktop CPU?()
第7题:
The WebSphere Application Server provides a Dynamic Cache Monitor. Which of the following can be monitored using this tool?()
第8题:
Tape library
NAS
Optical jukebox
SAN
第9题:
The workstation is not plugged in.
The thermal paste was not applied.
The memory was not installed properly.
The L2 cache was not cleared.
第10题:
Library cache
Row cache
Dictionary cache
Large area
Buffer cache
第11题:
PCI
Frontside bus
Backside bus
System I/O bus
第12题:
ARCH
SMON
LGWR
SERVER
第13题:
Which of the following statements is true about L3 cache?()
第14题:
Which of the following storage technologies connects by TCP/IP and can slow down network traffic?()
第15题:
Which of the following statements is true about L1 cache?()
第16题:
Which of the following is the MOST accurate description of a L2/L3 switch?()
第17题:
Which of the following storage technologies connects by TCP/IP and is separate from the companys LAN? ()
第18题:
A technician is replacing a processor in a workstation. After installation, the workstation starts up and immediately shuts down; the technician tries to start the workstation several more times and gets the same result. Which of the following is the cause of this issue?()
第19题:
You are analyzing how Oracle processes user statements. SQL and PL/SQL parse information is stored in which of the following database memory areas? ()
第20题:
The distribution of data written across all the memory DIMMs and the L1 cache
The distribution of data written across all the memory DIMMs in one bank
The distribution of data written across all the memory DIMMs and the processor
The distribution of data written across all the memory DIMMs and the L2 cache
第21题:
Library cache
Row cache
Session UGA
Buffer cache
第22题:
PCI
Frontside bus
Backside bus
System I/O bus
第23题:
Solid state drive
1 MB L2 cache memory
High-end graphics card
Dual core CPU
第24题:
Performs switching and routing duties
A router that directly connects to a switch
A multi-purpose switch fabric used in full mesh environments
A switch that directly connects to a router